| Main index | Section 3 | Options |
#include <pmc.h>
Arm CoreLink DMC-620 Dynamic Memory Controller performance counters are documented in
ARM CoreLink DMC-620 Dynamic Memory Controller Technical Reference Manual, , Revision: r0p0, 2017.
| Capability | Support |
PMC_CAP_CASCADE | amp;No |
PMC_CAP_EDGE | amp;No |
PMC_CAP_INTERRUPT | Yes |
PMC_CAP_INVERT | Yes |
PMC_CAP_READ | Yes |
PMC_CAP_PRECISE | amp;No |
PMC_CAP_SYSTEM | Yes |
PMC_CAP_TAGGING | amp;No |
PMC_CAP_THRESHOLD | Yes |
PMC_CAP_USER | amp;No |
PMC_CAP_WRITE | Yes |
| inc=value | |
| Two-bit value that controls direction of count for PMC. Behavior depend on selected event. | |
| inv | Invert the sense of comparison. |
| match=value | |
| Count only events matched by value. | |
| mask=qualifier | |
| Allow to apply qualifier mask to compared value. | |
| clkdiv2_cycle_count |
| clkdiv2_allocate |
| clkdiv2_queue_depth |
| clkdiv2_waiting_for_wr_data |
| clkdiv2_read_backlog |
| clkdiv2_waiting_for_mi |
| clkdiv2_hazard_resolution |
| clkdiv2_enqueue |
| clkdiv2_arbitrate |
| clkdiv2_lrank_turnaround_activate |
| clkdiv2_prank_turnaround_activate |
| clkdiv2_read_depth |
| clkdiv2_write_depth |
| clkdiv2_highhigh_qos_depth |
| clkdiv2_high_qos_depth |
| clkdiv2_medium_qos_depth |
| clkdiv2_low_qos_depth |
| clkdiv2_activate |
| clkdiv2_rdwr |
| clkdiv2_refresh |
| clkdiv2_training_request |
| clkdiv2_t_mac_tracker |
| clkdiv2_bk_fsm_tracker |
| clkdiv2_bk_open_tracker |
| clkdiv2_ranks_in_pwr_down |
| clkdiv2_ranks_in_sref |
| clk_cycle_count |
| clk_request |
| clk_upload_stall |
| PMC.DMC-620 (3) | Jul 22, 2022 |
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