This driver uses High Precision Event Timer hardware (part of the chipset,
usually enumerated via ACPI) to supply kernel with one time counter and
several (usually from 3 to 8) event timers.
This hardware includes single main counter with known increment frequency
(10MHz or more), and several programmable comparators (optionally with
automatic reload feature).
When value of the main counter matches current value of any comparator,
interrupt can be generated.
Depending on hardware capabilities and configuration, interrupt can be
delivered as regular I/O APIC interrupt (ISA or PCI) in range from 0 to 31,
or as Front Side Bus interrupt, alike to PCI MSI interrupts, or in so called
"LegacyReplacement Route" HPET can steal IRQ0 of i8254 and IRQ8 of the RTC.
Interrupt can be either edge- or level-triggered.
In last case they could be safely shared with PCI IRQs.
Driver prefers to use FSB interrupts, if supported, to avoid sharing.
If it is not possible, it uses single sharable IRQ from PCI range.
Other modes (LegacyReplacement and ISA IRQs) require special care to setup,
but could be configured manually via device hints.
Event timers provided by the driver support both one-shot an periodic modes
and irrelevant to CPU power states.
Depending on hardware capabilities and configuration, driver can expose each
comparator as separate event timer or group them into one or several per-CPU
In last case interrupt of every of those comparators within
group is bound to specific CPU core.
This is possible only when each of these comparators has own unsharable IRQ.