Manual Pages  — TERASIC_MTL

terasic_mtl devices are also attached to the syscons(4) framework, which implements a VT-compatible terminal connected to the tty(4) framework. ttyvX device nodes may be added to ttys(5) in order to launch login(1) sessions at boot.

Register, text, and pixel devices may be accessed using read(2) and write(2) system calls, and also memory mapped using mmap(2).

A more structured interface to control registers using the ioctl(2) system call, would sometimes be preferable to memory mapping. For touch screen input, it would be highly desirable to offer a streaming interface whose events can be managed using poll(2) and related system calls, with the kernel performing polling rather than the userspace application.

terasic_mtl supports only a nexus bus attachment, which is appropriate for system-on-chip busses such as Altera's Avalon bus. If the IP core is configured off of another bus type, then additional bus attachments will be required.