Main index | Section 8 | Options |
The following options are available:
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Directory paths where to look for microcode images. The option can be specified multiple times. The paths are added in order of the options appearance on the command line, default directories are appended after the user-supplied paths. | |
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Do not look for the microcode images in the standard directories. Currently standard directory to look for the microcode update files is /usr/local/share/cpucontrol. | |
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Show value of the specified MSR. MSR register number should be given as a hexadecimal number. The high word is printed first, then the low word is printed second. | |
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Store the value in the specified MSR register. The value argument can be prefixed with ~ operator. In this case the inverted value of argument will be stored in the register. | |
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Store the result of bitwise AND operation between mask and the current MSR value in the MSR register. The mask argument can be prefixed with ~ operator. In this case the inverted value of mask will be used. | |
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Store the result of bitwise OR operation between mask and the current MSR value in the MSR register. The mask argument can be prefixed with ~ operator. In this case the inverted value of mask will be used. | |
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Retrieve CPUID info. Level should be given as a hex number. | |
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Retrieve CPUID info. Level and level_type should be given as hex numbers. | |
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Apply CPU firmware updates. The cpucontrol utility will walk through the configured data directories and apply all firmware updates available for this CPU. | |
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Re-evaluate the kernel flags indicating the present CPU features.
This command is typically executed after a firmware update was applied
which changes information reported by the
CPUID
instruction.
Only execute the
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Increase the verbosity level. | |
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Show help message. | |
"cpucontrol -m 0x10 /dev/cpuctl0"
will read the contents of TSC MSR from CPU 0.
To set the CPU 0 TSC MSR register value to 0x1 issue
"cpucontrol -m 0x10=0x1 /dev/cpuctl0".
The following command will clear the second bit of TSC register:
"cpucontrol -m 0x10&=~0x02 /dev/cpuctl0".
The following command will set the forth and second bit of TSC register:
"cpucontrol -m 0x10|=0x0a /dev/cpuctl0".
The command
"cpucontrol -i 0x1 /dev/cpuctl1"
will retrieve the CPUID level 0x1 from CPU 1.
To perform firmware updates on CPU 0 from images located at /usr/local/share/cpuctl use the following command:
"cpucontrol -nd /usr/local/share/cpuctl -u /dev/cpuctl0"
CPUCONTROL (8) | January 5, 2018 |
Main index | Section 8 | Options |
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