| Main index | Section 4 | Options |
The Cherry View SoC has 5 banks of GPIO pins, NORTH, EAST, SOUTHEAST, SOUTHWEST and VIRTUAL. All but VIRTUAL are exposed to userland as /dev/gpiocN, where N is 0-3. Pins in each bank are pre-named to match names in the Intel® Atom⢠Z8000 Processor Series Vol 2
Intel® Atom⢠Z8000 Processor Series Vol 1,
Intel® Atom⢠Z8000 Processor Series Vol 2,
| CHVGPIO (4) | November 17, 2017 |
| Main index | Section 4 | Options |
Please direct any comments about this manual page service to Ben Bullock. Privacy policy.
| “ | The most horrifying thing about Unix is that, no matter how many times you hit yourself over the head with it, you never quite manage to lose consciousness. It just goes on and on. | ” |
| — Patrick Sobalvarro | ||