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Additional device entries for the ARM architecture include: device a10_gpio device bcm_gpio device imx51_gpio device lpcgpio device mv_gpio device ti_gpio device gpio_avila device gpio_cambria device zy7_gpio device pxagpio
Additional device entries for the MIPS architecture include: device ar71xxx_gpio device octeon_gpio device rt305_gpio
Additional device entries for the POWERPC architecture include: device wiigpio device macgpio
The acronym GPIO means "General-Purpose Input/Output."
The BUS physically consists of multiple pins that can be configured for input/output, IRQ delivery, SDA/SCL iicbus use, etc.
On some embedded architectures (like MIPS), discovery of the bus and configuration of the pins is done via device.hints(5) in the platform's kernel config(5) file.
On some others (like ARM), where FDT(4) is used to describe the device tree, the bus discovery is done via the DTS passed to the kernel, being either statically compiled in, or by a variety of ways where the boot loader (or Open Firmware enabled system) passes the DTS blob to the kernel at boot.
The following device.hints(5) are only provided by the ar71xx_gpio driver:
hint.gpio.%d.pinmask | |
This is a bitmask of pins on the GPIO board that we would like to expose for use to the host operating system. To expose pin 0, 4 and 7, use the bitmask of 10010001 converted to the hexadecimal value 0x0091. | |
hint.gpio.%d.pinon | |
This is a bitmask of pins on the GPIO board that will be set to ON at host start. To set pin 2, 5 and 13 to be set ON at boot, use the bitmask of 10000000010010 converted to the hexadecimal value 0x2012. | |
hint.gpio.function_set
hint.gpio.function_clear | |
These are bitmasks of pins that will remap a pin to handle a specific function (USB, UART TX/RX, etc) in the Atheros function registers. This is mainly used to set/clear functions that we need when they are set up or not set up by uBoot. | |
Simply put, each pin of the GPIO interface is connected to an input/output of some device in a system.
GPIO (4) | November 5, 2013 |
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