device iic device ic device iicsmb
The BUS physically consists of 2 active wires and a ground connection. The active wires, SDA and SCL, are both bidirectional. Where SDA is the Serial DAta line and SCL is the Serial CLock line.
Every component hooked up to the bus has its own unique address whether it is a CPU, LCD driver, memory, or complex function chip. Each of these chips can act as a receiver and/or transmitter depending on its functionality. Obviously an LCD driver is only a receiver, while a memory or I/O chip can both be transmitter and receiver. Furthermore there may be one or more BUS MASTERs.
The BUS MASTER is the chip issuing the commands on the BUS. In the I2C protocol specification it is stated that the IC that initiates a data transfer on the bus is considered the BUS MASTER. At that time all the others are regarded to as the BUS SLAVEs. As mentioned before, the IC bus is a Multi-MASTER BUS. This means that more than one IC capable of initiating data transfer can be connected to it.
|general i/o operation
|network IP interface
|I2C to SMB software bridge
I2C interfaces may act on the bus as slave devices, allowing spontaneous bidirectional communications, thanks to the multi-master capabilities of the I2C protocol.
Some I2C interfaces are available:
|Philips PCF8584 master/slave interface
|generic bit-banging master-only driver
|parallel port specific bit-banging interface
|Brooktree848 video chipset, hardware and software master-only interface
When a system supports multiple I2C buses, a different frequency can be configured for each bus by number, represented by the %d in the variable names below. Buses can be configured using any combination of device hints, Flattened Device Tree (FDT) data, tunables set via loader(8), or at runtime using sysctl(8). When configuration is supplied using more than one method, FDT and hint data will be overridden by a tunable, which can be overridden by sysctl(8).
|January 15, 2017
|Not only is UNIX dead, it's starting to smell really bad.
|— Rob Pike